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AMD Epyc

At ISSCC terminal week (that's the International Solid-State Circuits Briefing), AMD spoke almost the blueprint considerations that led to its Epyc server processors and why the company is confident that its arroyo to server CPU evolution will yield significant dividends compared with Intel's practices.

While both companies compete in the x86-64 server marketplace, they've taken very different approaches to their high-cease processors. Intel favors what's known as a monolithic core pattern. This design philosophy results in a single die mounted to the CPU package. As core counts scale up, the dice becomes larger and larger. The more cores you take, the trickier it is to ensure that each CPU core has appropriate admission to L3 enshroud at a single, consequent latency.

Der8auer comparion

Intel's 10-cadre i9-7900X on the left, while the 12-core i9-7920X is on the correct. The 7920X is identical to the 18-core i9-7980XE. Image past Der8auer

While Intel has never released formal die sizes, Anandtech claims x-core Skylake-SP CPUs weigh in at 322mmii, xviii-core chips at 484mmii, and 28-core chips at 698mmii. While nosotros have no idea how skillful Intel's yields on chips like the Core i9-7980XE are, one can reasonably expect them to be at least slightly lower than a four-cadre or eight-core part. This is why companies use die recovery to lock off bad cores rather than throwing the CPU abroad.

Intel, with its deep pockets, tin can beget to build these monolithic dies for high-end server and workstation fries, but the difficulty of doing so is why it typically takes the visitor months longer to launch new high-core server CPUs than their lower-core consumer counterparts.

AMD's Dilemma

Those of you lot who have followed AMD over the past few years are aware of just how precarious the company'southward financial situation was during the Bulldozer era. To engagement, AMD has introduced but two dies — the Ryzen seven 1800X die, which was used for every Ryzen CPU without integrated graphics, and the Ryzen 5 2400G die, which combines a quad-core CPU with an on-die GPU. I of the key criteria for AMD's new server initiative with Epyc was to find a way to scale its eight-core Ryzen 7 building block into server processors that could challenge Intel across the product stack.

Zepplin-SoC
To exercise this, AMD opted to use a Multi-Chip Module, or MCM. Equally the name implies, this solution connects multiple separate dies via interconnects that run between each Ryzen die. The advantage of using an MCM for Epyc and Threadripper is that it'due south much easier for AMD to scale its performance up or down into various markets.

EpycBenchmarkScaling

SPEC scaling between diverse CPU / MCM configurations.

Intel'due south 18-core Core i9-7980XE is faster than AMD's 16-core Threadripper, just it's also much more than difficult to scale. Right now, Intel'southward Core i9 family uses LGA2066, while its loftier-core Xeon parts use LGA3647. It'southward not clear if Intel can scale LGA2066 to higher core counts without requiring a full motherboard swap at even larger price premiums — and that's earlier nosotros get to the $1,000 toll difference betwixt Threadripper 1950X ($1,000, 16-cores) and the Intel Core i9-7980XE ($2,000, xviii cores).

AMD, in dissimilarity, has a path to a 32-cadre Threadripper right at present. It tin can ramp Threadripper to 24 or 32 cores only by increasing the number of MCMs under the heatspreader.

MCM-vs-SingleChip

The MCM design isn't without a few drawbacks; AMD estimates that using a multi-chip module costs it a 10 per centum surface area punishment, but that penalty is dwarfed by the whack information technology would take on CPU yields and CPU price. Using an MCM structure also immune AMD to move to 8 DDR4 memory channels (it's more accurate to say that Epyc is a 4×2 design in which each dice has its own dual-channel DDR4 retentivity implementation). A 4-die Epyc CPU offers 64 PCIe three.0 lanes, with 128 PCIe lanes available in a dual socket system. On the other hand, power consumption tests have shown that while AMD uses less ability per core than Intel does, the Infinity Fabric appears to burn more than power than Intel'due south ring motorbus topology.

EpycPackage

AMD wasn't willing to say much about how it intends to improve Epyc in future generations, but they were bullish on Epyc's performance to-appointment. Comprehensive data on server benchmarks is hard to come by, just a review past Johan De Gelas for Anandtech in 2022 showed Epyc as a strong competitor to Xeon in a number of tests, while outperforming information technology robustly in FPU tests. At that place are unquestionably tests where Epyc falls behind its competition. Anandtech concludes:

AMD's newest core is a formidable opponent. Scalar floating signal operations are clearly faster on the AMD cadre, and integer functioning is – at the same clock – on par with Intel's best. The dual CCX layout and quad die setup exit quite a chip of performance on the table, so it will be interesting how much AMD has learned from this when they launch the 7nm "Rome" successor… All in all, it must exist said that AMD executed very well and delivered a new server CPU that can offer competitive performance for a lower cost point in some key markets. Server customers with non-scalar sparse matrix HPC and Big Data applications should especially take observe.

AMD's MCM solution isn't perfect, but information technology's the solution the company needed for high-core-count server processors. It allowed AMD to use a single Ryzen die across all of its CPUs and to exist aggressive on server CPU pricing, thereby benefiting from economies of scale. When 12nm Ryzen CPUs launching in the adjacent few months, we should go a preview of any changes AMD made to the core or Infinity Fabric. As both companies scale up, it'll be interesting to see which approach wins out between connecting chips via MCM and using a large monolithic dice.